Risc-v, as the fifth generation of reduced instruction set, has attracted much attention in the industry. In the past two years, risc-v based technology, chips and products have shown a rapid growth. Its risc-v ecology is constantly enriched and improved, and its demand in AI, IOT, SSD, mobile terminal and other fields continues to heat up. The rapid development of risc-v is bound to lead to industrial changes.
As an authoritative enterprise in risc-v industry, sifive will hold risc-v technology seminar in Taiwan, aiming to share risc-v R & D experience, cutting-edge technology trends, development trends, agile design and other contents to the participants.
2nd floor, No.3, Taiyuan 1st Street, Zhubei City, Xinzhu County
|13:30 – 13:50||SiFive Overview||download|
|13:50 – 15:15||RISC-V Architecture Overview
-Vector ISA extension
|15:15 – 15:45||SiFive Core IP
-SiFive core overview
-SiFive core designer
|16:00 – 16:30||RISC-V Architecture Overview
-Debug @ trace
|16:30 – 17:00||Ecosystem